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"# " ! $ " % % " ! # # # !# % ? ? ? ? ? able to drive both windings of bipolar stepper motor ? ? ? ? ? up to 750 ma continuous output current for each winding ? ? ? ? ? up to 28v output sustaining voltage ? ? ? ? ? internal pwm current control ? ? ? ? ? built-in protection diode ? ? ? ? ? low output saturation voltage ? ? ? ? ? internal thermal shutdown ? lead free available (rohs compliant) the apx6219 is designed to drive both winding of a two-phase bipolar stepper motor or bidirectionally control 2 dc motors. apx6219 includes two h- bridges capable of continuous output current of 750 ma with peak start up to 1a and operating voltages up to 28v. motor winding current can be controlled by the internal fixed-frequency, pulse-width modulated (pwm), current-control circuitry. wide range current control is controlled by means of two logic inputs with a external reference voltage for each bridge. the peak load current limit is set by the user?s selection of a reference voltage and current-sensing resistor. two logic-level select output current limits of 0%,33%, 67%, or 100% of the maximum level. a phase input to each bridge determines load current direction. a thermal shutdown protection circuit disables the out- puts if the chip temperature over the safe operation limit. the apx6219 come in sop-24 package. ? scanner ? stepping motor control ? thermal printer sop-24 (top view) out1a out2a sense2 gnd comp.input1 l01 gnd out2b comp.input2 l02 i12 out1b gnd l11 phase1 rc1 1 2 3 4 5 6 7 8 12 11 v bb (load supply) 10 9 16 15 14 13 17 18 19 20 24 23 22 21 v cc (logic supply) vref1 sense1 gnd phase2 vref2 rc2 pwm stepper motor driver ? apx6219 package code k : so p - 24 temp. range i : -40 c to 85 c handling code tu : tube tr : tape & reel lead free code l : lead free blank : original device handling code temp. range package code apx6219 k : apx6219 xxxxx xxxxx - date code lead free code pin no. name i/o description 1,2 output a o h- bridge output connection. the output stage is a ? h ? bridge formed by four transistors and four-protection diode for switching applications. 3,23 sense resistor o connection to lower emitters of output stage for insertion of current sensor resistor to check the peak value of output current 4,22 comparator input i the voltage across the sense resistor is feedback to this input through the low pass filter r c c c . the higher power transistors are disabled when the sense voltage exceeds the reference voltage of selected comparator. the current decays for a time set by r t c t when this happen 5,21 output b o see pins 1,2 6,7,18,19 ground ground connection these pins are logic inputs which select the outputs of the comparators to set the output current level. current also depends on the sensing resistor and reference voltage. i0 i1 current level h h l h h l 8,9 i02/i12 i l l no current low current 1/3 i o max medium current 2/3 i o max maximum current i o max 20,17 i01/i11 i see pins 8,9; current level control for channel2 10,16 phase i this ttl-compatible logic input sets the current flow direction through load. a schmitt trigger with this input provides the noise immunity and a delay circuit prevents output stage short circuits during switching 11,15 reference voltage i a voltage apply this pin sets the input of a comparator to control the output current 12,14 r t c t o a r t c t connection to this pin sets the off time of higher power transistor 13 v cc logic supply voltage 24 v bb load supply voltage notes: anpec lead-free products contain molding compounds/die attach materials and 100% matte in plate termi- nation finish; which are fully compliant with rohs and compatible with both snpb and lead-free soldiering operations. anpec lead-free products meet or exceed the lead-free requirements of ipc/jedec j std-020c for msl classifica- tion at lead-free peak reflow temperature. ? & ! logic surrent select power bridge 1 logic surrent select thermal shutdown power bridge 2 (22) comparator input1 (14) rc1 (13) logic supply (24) load supply (1) out1a (21) out1b winding1 (2) out2a (5) out2b winding2 (20) i01 17 i11 (16) phase1 (15) vref1 (11) vref2 (8) i02 (9) i12 (10) phase2 (6,7,18,19) gnd (4) comparator input2 (12) rc2 (23) sense1 r sense1 (3) sense2 r sense2 " # $ symbol parameter rating unit v bb load supply voltage 30 v i o output current (peak) 1 a i o output current (continuous) 750 ma v cc logic supply voltage 7 v v in logic input voltage -0.3 to v cc +0.3 v v sense driver output sense voltage 1.5 v r th,ja thermal resistance ? junction to ambient* sop-24 75 c/w r th,jc thermal resistance ? junction to case sop-24 15 c/w p d power dissipation internally limited w t j junction temperature 0 to 150 c t op operating temperature range 0 to 70 c t stg storage temperature range -65 to +150 c t l lead temperature (soldering, 10 second) 260 c (*) with minimized copper area. ? % & apx6219 symbol parameter test conditions min. typ. max. unit output drivers (outa or outb) v bb motor supply voltage 10 28 v i leak output leakage current v out =v bb v out =0 <1 <-1 50 -50 a v ce (sat) output saturation voltage sink driver, i out =+500ma sink driver, i out =+750ma source driver, i out =-500ma source driver, i out =-750ma 0.4 0.8 1.1 1.4 0.7 1.1 1.4 1.7 v i r clamp diode leakage current v r =28v <1 50 a v f clamp diode forward voltage sink diode source diode i f =750ma 1.6 1.6 2 2 v i bb (on) driver supply current both bridges on, no load 14 25 ma i bb (off) driver supply current both bridges off 2 10 ma control logic v ih voltage input all inputs 2.4 v v il voltage input all inputs 0.8 v i ih input current v in =2.4v <1 20 a i il input current v in =0.8v -5 -50 a v ref reference voltage 1.5 7.5 v i cc (on) logic supply current i0=i1=0.8v, no load 47 57 ma i cc (off) logic supply current i0=i1=2.4v, no load 8 14 ma v ref /v sense current limit threshold (at trip point) i0=i1=0.8v i0=2.4v,i1=0.8v i0=0.8v,i1=2.4v 9.5 13.5 25.5 10 15 30 10.5 16.5 34.5 t off cutoff time r t =56k ? , c t =820pf 45 s t d turn off delay 2 s protection over temperature shutdown 150 c ots over temperature shutdown hystersis hystersis 20 c unless otherwise noted these specifications apply over full temperature, v bb =28v, v cc =4.75 to 5.25v, v ref =5v, t j =0 to 125 c . typical values refer to t j =25 c . ? ' ' ( v phase i trip =v ref /10 r s t d t off i trip - + 0 i out rs motor v bb bridge on source off all off ) & ? ' i01 i11 phase1 motor2 current 167 ma half-step motor drive full-step motor drive stand-by -333 ma -500ma 500ma phase2 i02 i12 motor1 current -167 ma -333 ma -500ma 500ma 333 ma 333 ma i01 i11 phase1 motor2 current 167 ma half-step motor drive full-step motor drive stand-by -333 ma -500ma 500ma phase2 i02 i12 motor1 current -167 ma -333 ma -500ma 500ma 333 ma 333 ma * + ? ( 1 2 3 12 4 5 6 7 8 9 10 11 24 23 22 13 21 20 19 18 17 16 15 14 r c r s c c r c r s c c r t c t r t c t v cc v ref1 v bb + stepper motor v ref2 fom p fom p r t =56k ? , c t =820pf r c =1k ? , c c =820pf r s =1 ? 0.1 f 0.1 f 0.1 f 100 f ,- v ref i0 i1 10 cmp - + r s 1 ? one shot r t 56k ? c t 820pf outa motor sense source disable outb 20k ? 40k ? 10k ? v bb r c c c comp in rc v ref i0 i1 10 cmp - + r s 1 ? one shot r t 56k ? c t 820pf outa motor sense source disable outb 20k ? 40k ? 10k ? v bb r c c c comp in rc h l l l h h outb outa phase h l l l h h outb outa phase true table ' . - ? ) 0 0. 2 0. 4 0. 6 0. 8 1 1. 2 1. 4 1. 6 1. 8 4 4.5 5 5.5 6 0 0.5 1 1.5 2 2.5 44.555.56 ,- & all bridge enable time ( 0.1ms/div) i0 i1 i l (0~300ma) v out1a (1v/div) all bridge disable time ( 0.1ms/div) i0 i1 i l (0~300ma) v out1a (1v/div) i0, i1 threshold voltage v cc (v) i0 , i1(v) i io =0 a v bb =12v phase pin threshold voltage v cc (v) phase (v) v phase+ v phase- i phase+= i phase- =0 a v bb =12v ? * 0 100 200 300 400 500 600 700 800 900 0 0.25 0.5 0.75 1 1.25 1.5 1.75 20 30 40 50 60 70 80 90 100 110 0 102030405060708090100 ,- & v ce (v) i e (ma) sink output saturation voltage source r t c t vs. cut off time r t (k ? ) cut off time( s) c t =470pf 820pf 1000pf operating waveform1 time (1ms/div) time (0.1ms/div) v phase1 (5v/div) i l (500ma~-500ma) v out1a (10v/div) r t =56k ? ,c t =820pf, r c =1k ?, c c =820pf v out1b (10v/div) operating waveform2 i l (300ma~-300ma) v comp input1 v rc1 (1.6v~4.2v) v out1a (10a/div) r t =56k ? ,c t =820pf, r c =1k ?, c c =820pf v cc =5v v bb =12v ? ,- & time (5ms/div) v rc1 (1.6v~4.2v) i l (300ma~-300ma) v out1a (10v/div) v out1b (10v/div) half stage operation ? pwm current control the apx6219 dual bridge is designed to drive both windings of a bipolar stepper motor. output current is sensed and controlled independently in each bridge by an external sense resistor (r s ), internal comparator, and monostable multivibrator. when the bridge is turned on, current increases in the motor winding and it is sensed by the external sense resistor until the sense voltage (v compin ) reaches the level set at the comparator ? s input: i trip = v ref /10 r s the comparator then triggers the monostable which turns off the source driver of the bridge. the actual load current peak will be slightly higher than the trip point (especially for low-inductance loads) because of the internal logic and switching delays. this delay (t d ) is typically 2 s. after turn-off, the motor current decays, going through the ground-clamp diode and sink transistor (source off). the source driver ? s off time is determined by the external rc timing components, where t off = r t c t within the range of 30k ? to 100k ? and 470pf to 1000pf.when vrc drop to certain voltage, the source driver will be re-enabled automati- cally (bridge on), the winding current is again limited at the desired level. loads with high v bb , low l , high-frequency and low current will may result in high turn-on current peaks. this peak (appearing across r s ) will attempt to trip the comparator, resulting in erroneous current control or high-frequency oscillations. an external r c c c time delay should be used to form low pass filter to reduce noise to avoid the comparator ? s fault operation. the locations of r c , c c , r c components should be as close to the apx6219 as possible. logic control of output current two logic level inputs (l0 and i1) allow digital selection of the motor winding current at 100%, 67%, 33%, or 0% of the maximum level per the table. the 0% out- put current condition turns off all drivers in the bridge and can be used as an output disable/enable function. during half-step operations, the l0 and l1 allow the p to control the motor at a constant torque between all positions in an eight-step sequence. this is accom- plished by digitally selecting 67% drive current when two phases are on. when all drivers are turn off will make rapid current decay when phases be changed. this helps to ensure proper motor operation at high step rates. the logic control inputs can also be used to select a reduced current level (and reduced power dissipation) for ? hold ? conditions and/or increased current (and avail- able torque) for start-up conditions. general the phase input to each bridge determines the di- rection motor winding current flows. an internally gen- erated deadtime (approximately 2 s) prevents shoot through that can occur when switching the phase input. thermal protection circuitry turns off all drivers when the junction temperature reaches +150 c. it is only intended to protect the device from failures due to excessive junction temperature and should not im- ply that output short circuits are permitted. the out- put drivers are re-enabled when the junction tempera- ture cools to +130 c. the apx6219 output drivers are optimized for low out- put saturation, less than 2v (source plus sink) at load- ing 500ma.under normal operating conditions, this allows continuous operation of both bridges simulta- neously at 750ma (such as typical application). ? so ? 300mil ( reference jedec registration ms-013) millimeters variations- d inches variations- d dim min. max. variations min. max. dim min. max. variations min. max. a2.35 2.65 so-16 10.10 10.50 a 0.093 0.1043 so-16 0.398 0.413 a1 0.10 0.30 so-18 11.35 11.76 a1 0.004 0.0120 so-18 0.447 0.463 b 0.33 0.51 so-20 12.60 13 b 0.013 0.020 so-20 0.496 0.512 d see variations so-24 15.20 15.60 d see variations so-24 0.599 0.614 e 7.40 7.60 so-28 17.70 18.11 e 0.2914 0.2992 so-28 0.697 0.713 e 1.27bsc so-14 8.80 9.20 e 0.050bsc so-14 0.347 0.362 h 10 10.65 h 0.394 0.419 l 0.40 1.27 l 0.016 0.050 n see variations n see variations 10 8 10 8 n 12 3 e h d l gauge plane 1 e b a1 a ? & t 25 c to peak tp ramp-up t l ramp-down ts preheat tsmax tsmin t l t p 25 temperature time critical zone t l to t p &- * terminal material solder-plated copper (solder material : 90/10 or 63/37 snpb), 100%sn lead solderability meets eia specification rsi86-91, ansi/j-std-002 category 3. $ / (ir/convection or vpr reflow) $ / profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (t l to t p ) 3 c/second max. 3 c/second max. preheat temperature min (tsmin) temperature max (tsmax) time (min to max) (ts) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: temperature (t l ) time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak/classificatioon temperature (tp) see table 1 see table 2 time within 5 c of actual peak temperature (tp) 10-30 seconds 20-40 seconds ramp-down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. notes: all temperatures refer to topside of the package .measured on the body surface. ? $ " - test item method description solderability mil-std-883d-2003 245 c , 5 sec holt mil-std-883d-1005.7 1000 hrs bias @ 125 c pct jesd-22-b, a102 168 hrs, 100 % rh , 121 c tst mil-std-883d-1011.9 -65 c ~ 150 c, 200 cycles esd mil-std-883d-3015.7 vhbm > 2kv, vmm > 200v latch-up jesd 78 10ms , i tr > 100ma , t ao e w po p ko bo d1 d f p1 table 2. pb-free process ? package classification reflow temperatures package thickness volume mm 3 <350 volume mm 3 350-2000 volume mm 3 >2000 <1.6 mm 260 +0 c* 260 +0 c* 260 +0 c* 1.6 mm ? 2.5 mm 260 +0 c* 250 +0 c* 245 +0 c* 2.5 mm 250 +0 c* 245 +0 c* 245 +0 c* *tolerance: the device manufacturer/supplier shall assure process compatibility up to and including the stated classification temperature (this means peak reflow temperature +0 c. for example 260 c+0 c) at the rated msl level. table 1. snpb entectic process ? package peak reflow temperatures package thickness volume mm 3 <350 volume mm 3 350 <2.5 mm 240 +0/-5 c 225 +0/-5 c 2.5 mm 225 +0/-5 c 225 +0/-5 c $ / 0 12 ? application carrier width cover tape width devices per reel sop- 24 24 21.3 1000 application a b c j t1 t2 w p e 330 162 1.5 12.75 0.15 2 0.6 24.4 0.2 2 0.2 24 0.3 12 0.1 .75 0.1 f d d1 po p1 ao bo ko t sop- 24 11.5 0.1 1.55 +0.1 1.5+ 0.25 4.0 0.1 2.0 0.1 10.9 0.1 15.9 0.1 3.1 0.1 .35 0.05 (mm) anpec electronics corp. head office : 5f, no. 2 li-hsin road, sbip, hsin-chu, taiwan, r.o.c. tel : 886-3-5642000 fax : 886-3-5642050 taipei branch : 7f, no. 137, lane 235, pac chiao rd., hsin tien city, taipei hsien, taiwan, r. o. c. tel : 886-2-89191368 fax : 886-2-89191369 * ( ( , , 0 12 a j b t2 t1 c |
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